GPU Architecture Showcase

Animated visualizations of my GPU-architecture coursework (Georgia Tech OMSCS, CS8803). My own measured data and visualization code only — honor-code statement.

CUDA Core vs Tensor Core

A trace-driven 8-core GPU simulator, two config lines apart: tensor ops at 64-cycle latency, 8-wide issue. Every half-precision benchmark gets slower — up to +56% stall cycles — because 4 warps per core can't hide the latency. Watch the runs stay in lockstep, then fork.

simulator · per-kernel timelines · 100% reference match

Warp Branch Divergence Detection

SASS → basic blocks → control-flow graph → taint analysis seeded at the thread-index read. Watch taint flow through registers and memory until three branch predicates light up divergent on a bitonic compare-exchange kernel.

static analysis · CFG · def-use taint worklist